1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device provided with a diode.
2. Description of the Background Art
A substrate diode for controlling current is applied in a bridge output stage of a junction isolation type IC (Integrated Circuit) for controlling a motor. A conventional semiconductor device provided with such a substrate diode is described as follows.
An N-type island region for output, in which an output transistor is formed and to which a load, such as a motor, is connected, is formed at a Pxe2x88x92 substrate as described above in an application wherein a load current is allowed to freewheel. This N-type island region for output is biased to a negative voltage at the time of freewheel operation and, thereby, the junction between the N-type island region for output and the Pxe2x88x92 substrate becomes of a forward bias condition so that electrons are injected from the N-type island region for output to the Pxe2x88x92 substrate.
Electrons are injected into the Pxe2x88x92 substrate and, thereby, a parasitic NPN transistor existing between a passive N-type island region, formed at the Pxe2x88x92 substrate and forming a portion of another control circuit, and the N-type island region for output starts to operate.
Therefore, in addition to a current that becomes the main current flowing from the N-type island region for output toward a peripheral anode region formed at the Pxe2x88x92 substrate, an unnecessary current flows from the N-type island region for output to the passive N-type island region. As a result, the semiconductor device in some cases causes a malfunction.
Concerning such a malfunction, a technique for suppressing such an unnecessary current is reported in, for example, the reference, (O. Gonnard et al., xe2x80x9cMulti-ring Active Analogic Protection for Minority Carrier Injection Suppression in Smart Power Technologyxe2x80x9d, ISPSD2001, pp. 351-354).
That is to say, a technique wherein a predetermined P-type isolation region and a dummy N-type island region are provided in a region of the Pxe2x88x92 substrate located between the N-type island region for output and the passive N-type island region and this P-type isolation region and the dummy N-type island region are short circuited by an aluminum wire is considered effective for suppressing the unnecessary current.
Here, a semiconductor device wherein this technique is adopted is concretely described. As shown in FIG. 10, a peripheral anode 104a, an N-type island region 107a for output and passive N-type island region 107b, respectively, are formed at a distance from each other in one of the main surfaces of a Pxe2x88x92 substrate 101.
A load 114, such as a motor, is connected to N-type island region 107a for output. A substrate diode is formed of Pxe2x88x92 substrate 101 and N-type island region 107a for output. Passive N-type island region 107b becomes a portion of another control circuit formed at Pxe2x88x92 substrate 101, for example, a collector of an NPN transistor.
Here, N-type island region 107a for output is formed of a buried N+ floating collector region 105a and an N well 106a while passive N-type island region 107b is formed of a buried N+ floating collector region 105b and an N well 106b. 
In addition, isolation regions 104b and 104c connected to Pxe2x88x92 substrate 101 are formed at a region of Pxe2x88x92 substrate 101 located between N-type island region 107a for output and passive N-type island region 107b. 
Furthermore, a similar isolation region 104a is formed at a region of Pxe2x88x92 substrate 101 on the side of N-type island region 107a for output opposite to the side wherein passive N-type island region 107b is located. This isolation region 104a forms a peripheral anode. Here, isolation regions 104a, 104b and 104c, respectively, are formed of P+ regions 102a to 102c and P wells 103a to 103c. 
On the other hand, a P substrate anode 115 is formed at the other main surface of Pxe2x88x92 substrate 101. A load current (main current) flows through isolation region (peripheral anode) 104a and P substrate anode 115 at the time of freewheel operation.
Nxe2x88x92 epitaxial regions 108, of which the impurity concentration is comparatively low, are formed at a region located between N-type island region 107a for output and isolation region 104c, at a region located between passive N-type island region 107b and isolation region 104b, and the like, in order to attain a necessary withstand voltage.
In the semiconductor device shown in FIG. 10, two isolation regions 104b and 104c are provided at a region between N-type island region 107a for output and passive N-type island region 107b and, furthermore, a dummy N-type island region 107c is formed at a region located between these two isolation regions 104b and 104c. Dummy N-type island region 107c is formed of a buried N+ floating collector region 105c and an N well 106c. 
Dummy N-type island region 107c and isolation region 104b, which is located on the side of this dummy N-type island region 107c on which passive N-type island region 107b is located, are electrically short circuited via an aluminum wire 112.
In the above described semiconductor device, electrons are injected from N-type island region 107a for output toward Pxe2x88x92 substrate 101 under the condition wherein the voltage of N-type island region 107a for output is negative (negative bias) so that electrons are stored in Pxe2x88x92 substrate 101.
The stored electrons tend to diffuse toward passive N-type island region 107b. At this time, dummy N-type island region 107c is electrically short circuited to isolation region 104b, which is electrically connected to Pxe2x88x92 substrate 101, and, thereby, the voltage of dummy N-type island region 107c becomes higher than the voltage of isolation region 104b. That is to say, the potential of dummy N-type island region 107c becomes higher than the potential of isolation region 104b. 
Thereby, the stored electrons are captured by dummy N-type island region 107c so that the tendency of the electrons to diffuse toward passive N-type island region 107b is restricted.
As a result, little current flows from passive N-type island region 107b toward N-type island region 107a for output and the main current flows as shown by solid line 200 from the peripheral anode (isolation region 104b) toward N-type island region 107a for output.
Thus, in the conventional semiconductor device, the tendency of the current to flow from passive N-type island region 107b toward N-type island region 107a for output is restricted so that malfunctions that accompany the current are prevented in the condition wherein the voltage of N-type island region 107a for output is negative.
However, the following problem arises in the conventional semiconductor device. The results of device simulations carried out on the structure of the semiconductor device shown in FIG. 10 are shown in FIGS. 11 and 12, respectively. FIG. 11 shows the waveform of current Ie that flows through N-type island region 107a for output and the waveform of current Ic that flows through passive N-type island region 107b, respectively, in the case that voltage Ve of N-type island region 107a for output is switched to positive, to negative and to positive in sequence over a period of time, as shown in FIG. 12.
FIG. 12 shows the waveform of voltage Ve that is applied to N-type island region 107a for output, the waveform of voltage Vsal of aluminum wire 112 and the waveform of voltage Vb of the peripheral anode (isolation region 104a), respectively.
Here, in this device simulation, an external resistor corresponding to load 114 is added between N-type island region 107a for output and the bias power supply while an external register corresponding to a wire resistor, or the like, is added between the peripheral anode and ground. In addition, a resin die bonding type is posited as the semiconductor device so that P substrate anode 115 is set at the open condition.
As shown in FIG. 12, voltage Ve of N-type island region 107a for output is in the negative condition (negative bias) in a range of time of from 0.5 xcexcs to 1.0 xcexcs. This condition is the condition wherein freewheel operation is carried out and is the condition wherein the load current flows from the peripheral anode (isolation region 104a) toward N-type island region 107a for output.
At this time, the electrons injected from N-type island region 107a for output toward Pxe2x88x92 substrate 101 so as to stored are captured by dummy N-type island region 107c having a potential higher than that of isolation region 104b, as described above. Thereby, it is seen, as shown in FIG. 11, that little current Ic flows through passive N-type island region 107b. 
Thus, it is seen from the result of the device simulation that the technique of electrically short circuiting dummy N-type island region 107c to isolation region 104b, which is electrically connected to Pxe2x88x92 substrate 101 via aluminum wire 112, is an effective means for the suppression of current in the condition wherein the voltage of N-type island region 107a for output is negative.
As shown in FIG. 11, however, it is seen that a comparatively large current Ic temporarily flows through passive N-type island region 107b immediately after the voltage of N-type island region 107a for output is switched from the negative condition to the positive condition at a time after 1.0 xcexcs has elapsed. That is to say, current Ic flows when the substrate diode formed of Pxe2x88x92 substrate 101, including isolation region 104a, and of N-type island region 107a for output performs reverse recovery (reverse recovery period).
The device simulation results of voltage (potential) and current distributions within the semiconductor device at this time are shown in FIGS. 13 and 14. In particular, FIG. 13 shows the condition at time 1.03 xcexcs while FIG. 14 shows the condition at time 1.05 xcexcs.
As shown in FIGS. 13 and 14, the voltage of Pxe2x88x92 substrate 101 transitionally rises so that the junction between passive N-type island region 107b and Pxe2x88x92 substrate 101 becomes of a forward bias condition and electrons shift toward N-type island region 107a for output before the electrons stored in a region of Pxe2x88x92 substrate 101 in the vicinity of passive N-type island region 107b are swept out so as to be eliminated. As a result, current Ic flows from N-type island region 107a for output toward passive N-type island region 107b through Pxe2x88x92 substrate 101.
That is to say, immediately after the voltage of N-type island region 107a for output is switched from negative to positive, as shown in FIG. 15, current Ic temporarily flows from N-type island region 107a for output toward passive N-type island region 107b in addition to the flow of main current Ib that flows from N-type island region 107a for output to the peripheral anode (isolation region 104a) through Pxe2x88x92 substrate 101.
Furthermore, as shown in FIG. 11, it is seen that a comparatively large current Ic temporarily flows through passive N-type island region 107b in the vicinity of time 0.0 xcexcs. This is a case wherein the voltage of N-type island region 107a for output is switched from the condition of 0 to positive.
In this case, the voltage of Pxe2x88x92 substrate 101 transitionally rises via the junction capacitor between N-type island region 107a for output and Pxe2x88x92 substrate 101 due to a rapid rise in the voltage of N-type island region 107a for output. As a result, the junction between passive N-type island region 107b and Pxe2x88x92 substrate 101 becomes of the forward bias condition so that current Ic temporarily flows from N-type island region 107a for output toward passive N-type island region 107b. 
That is to say, immediately after that, the voltage of N-type island region 107a for output is switched from 0 to positive, as shown in FIG. 16, current Ic temporarily flows from N-type island region 107a for output toward passive N-type island region 107b in addition to the flow of main current Ib that flows from N-type island region 107a for output to the peripheral anode (isolation region 104a) through Pxe2x88x92 substrate 101.
Here, this case is different from the above described case immediately after the voltage of N-type island region 107a for output is switched from negative to positive and the voltage of N-type island region 107a for output is switched from 0 to positive and, therefore, few electrons are stored in Pxe2x88x92 substrate 101.
Therefore, as shown in FIG. 17, the magnitude of current Ic (portion A in FIG. 17) that flows from N-type island region 107a for output toward passive N-type island region 107b and the period of time during which current Ic flows are, both, less than those of the case of current Ic (portion B in FIG. 17) that flows immediately after the voltage of N-type island region 107a for output is switched from negative to positive.
Here, though in addition to the above described semiconductor device, the configuration wherein isolation regions 104b and 104c as well as dummy N-type island region 107c, respectively, are connected to ground voltage has also been proposed, in this case the rise in voltage of Pxe2x88x92 substrate 101 is restricted and, thereby, the effect of the reduction of current Ic that accompanies a rapid rise of the voltage of N-type island region 107a for output is recognized.
At the time of freewheel operation, however, isolation regions 104b and 104c, which are connected to ground voltage, operate as the anode together with the peripheral anode 104a so that current flows through isolation regions 104b and 104c. Therefore, the density of electrons increases in a portion of a region of Pxe2x88x92 substrate 101 located in the vicinity of passive N-type island region 107b. 
As a result, there is a problem wherein a parasitic NPN transistor cannot be sufficiently restricted from operating between passive N-type island region 107b and N-type island region 107a for output.
As described above, in the conventional semiconductor device, immediately after the voltage of N-type island region 107a for output is switched from negative to positive, and immediately after the voltage of N-type island region 107a for output is switched from 0 to positive, a current flows between N-type island region 107a for output and passive N-type island region 107b so that there is a problem wherein this current invites a malfunction of the semiconductor device.
The present invention is provided to solve the above described problems and a purpose thereof is to provide a semiconductor device wherein a current is restricted from flowing between an N-type island region and a passive N-type island region immediately after the voltage of the N-type island region for output is switched from negative to positive and immediately after the voltage of the N-type island region for output is switched from 0 to positive so that occurrence of malfunctions is prevented.
A semiconductor device according to the present invention is provided with a first impurity region of a second conductive type, a second impurity region of the second conductive type, a third impurity region of a first conductive type, a fourth impurity region of the second conductive type, a fifth impurity region of the first conductive type, a pair of sixth impurity regions of the second conductive type, a seventh impurity region of the first conductive type and an electrode part. The first impurity region of the second conductive type is formed at the main surface of a semiconductor substrate of the first conductive type. The second impurity region of the second conductive type is formed at the main surface of the semiconductor substrate at a distance from the first impurity region. The third impurity region of the first conductive type is formed at the surface of a region of the semiconductor substrate located between the first impurity region and the second impurity region. The fourth impurity region of the second conductive type is formed at the surface of a region of the semiconductor substrate located between the first impurity region and the third impurity region. The fifth impurity region of the first conductive type is formed at the surface of the fourth impurity region. The pair of sixth impurity regions of the second conductive type is formed at a distance from each other in the surface of the fifth impurity region. The seventh impurity region of the first conductive type is formed at the surface of a region portion of the semiconductor substrate located on the side of the first impurity region opposite to the side on which the fourth impurity region is located. The electrode part is formed on a region portion of the fifth impurity region located between the pair of sixth impurity regions. One region of the pair of sixth impurity regions and the third impurity region are electrically connected to each other. The other region of the pair of sixth impurity regions is grounded.
According to this structure, the voltage of the semiconductor substrate transitionally rises so that the junction between the second impurity region (passive N-type island region) and the semiconductor substrate tends to become of a forward bias condition immediately after the voltage of the first impurity region (N-type island region for output) is switched from the 0 condition to the positive condition and immediately after the voltage of the first impurity region is switched from the negative condition to the positive condition. On the other hand, a voltage of a predetermined threshold voltage, or higher, is applied to the electrode part when the voltage of the first impurity region is positive so that a switching element (MOSFET) formed of the fifth impurity region, the sixth impurity region and the electrode part becomes of the ON condition. Therefore, the main current flows from the first impurity region to the seventh impurity region (isolation region) through the semiconductor substrate and, at the same time, current Ids flows from the first impurity region to be bypassed to ground through the semiconductor substrate, the third impurity region (isolation region) and the pair of sixth impurity regions (N++ regions). Thereby, in this semiconductor device, a major portion of current Ic, which flows from the first impurity region toward the second impurity region in the conventional semiconductor device, is bypassed to ground as current Ids that flows through the sixth impurity region. As a result, current Ic that flows from the first impurity region toward the second impurity region is greatly reduced both immediately after the voltage of the first impurity region is switched from 0 to positive and immediately after the voltage of the first impurity region is switched from negative to positive so that malfunctions of the semiconductor device can be prevented.
In addition, it is preferable for the third impurity region and the fourth impurity region to be, further, electrically connected to each other.
Thereby, the effect of restriction of a leak current due to diffusion of electrons into the second impurity region in a condition wherein the voltage of the first impurity region is negative can also be obtained in the same manner as in the prior art.
Furthermore, it is preferable for the electrode part and the first impurity region to be electrically connected to each other.
In this case, the switching element can be turned to the ON condition without fail according to the timing of a positive voltage that is applied to the first impurity region.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.